Algorithm-Architecture Trade-offs in Network Processor Design

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1 Diss. ETH No Algorithm-Architecture Trade-offs in Network Processor Design A dissertation submitted to the SWISS FEDERAL INSTITUTE OF TECHNOLOGY ZURICH for the degree of Doctor of Technical Seiences presented by MATTHIAS GRIES Dipl.-Ing., TU Hamburg-Harburg, Germany born May 15, 1972 citizen of Germany accepted on the recommendation of Prof. Dr. Lothar Thiele, examiner Prof. Dr. Wolfgang Fichtner, co-examiner 2001 Examination date: May 21, 2001

2 Abstract The increasing use of computer netwarks for all kinds of information exchange between autonomous computing resources is associated with a number of sideeffects. In the Internet, where computers all over the globe are interconnected, the traffic volume grows faster than the infrastructure improves, leading to congestion of networking routes. In the application domain of embedded systems, networks can be used to couple complex sensor systems with a computing core. The provision of raw bandwidth may not be sufficient in such systems to allow control with real-time constraints. The underlying requirement in both cases is a network service with a defined quality, for instance, in terms of traffic loss ratio and worst-case communication delay. The provision of suitable communication services however requires a noticeable overhead in terms of computing load. Therefore, application-specific hardware accelerators - so-called network processors - have been introduced to speed up or even enable the maintenance of certain network services. The following issues have not yet been dealt with: Although there are network processors for high-speed networks, no processor is available that considers the requirements of the interface between networks of a service provider and a customer. While each individual task of a network processor is weil understood, it is unclear how different tasks, that potentially show interfering properties, should cooperate to preserve the service quality. The above issues are addressed in this thesis and the major contributions in the research area of algorithms and architectures for network processors are: A service scheme is defined which takes care of the requirements at the interface between networks of a service provider and a customer. Various combinations of network processing tasks are explored for this service scheme by exhaustive simulation. The exploration focuses on the preservation of service quality parameters.

3 ii The exploration of processing tasks is combined with an evaluation of suitable building blocks for architectures of network processors so that the interaction of algorithm behavior and timing of hardware resources can be examined by co-simulation of both aspects. Due to its impact on the overall performance, refinements of a particular building block - the memory controller - are evaluated. The influence of an application-specific memory controller is explored by extensive simulation of various benchmarks, dynamic RAMs, and memory access schemes incorporated into a mature epd simulator.

4 Kurzfassung Aufgrund der zunehmenden Verbreitung von Computernetzwerken für den Informationsaustausch aller Art zwischen autonomen Rechnern kann man gewisse Seiteneffekte beobachten. Im Internet, das Rechner verteilt auf der ganzen Welt miteinander verbindet, steigt die Menge des Verkehrs stärker an, als Netzwerkinfrastruktur nachgerüstet werden kann. Dies führt zu einer Überlastung von Netzwerkverbindungen. Ein weiteres Beispiel sind eingebettete Systeme, in denen Netzwerke eingesetzt werden können, um Sensorsysteme an einen Rechnerkern zu koppeln. Es ist in solchen Systemen meistens nicht ausreichend, lediglich Durchsatz durch ein Netzwerk zur Verfügung zu stellen, da ggf. Echtzeitbeschränkungen nicht eingehalten werden können. Beide Anwendungsfälle haben gemeinsam, dass Dienste definierter Qualität benötigt werden, z.b. spezifiziert gemäss einer Verlustrate oder einer maximalen Verzögerung. Die Unterstützung von geeigneten Kommunikationsdiensten bringt jedoch einen merklichen Anstieg an Rechenzeitbedarf mit sich. Deshalb sind anwendungsspezifische Hardwarebeschleuniger - sog. Netzwerkprozessoren - vorgeschlagen worden, um Netzwerkdienste zu etablieren und zu ermöglichen. Die folgenden Fragestellungen sind bisher noch nicht behandelt worden: Obwohl viele Netzwerkprozessoren für hohen Durchsatz erhältlich sind, fehlen Prozessoren, welche die Bedürfnisse an der Schnittstelle zwischen Netzwerken eines Dienstanbieters und eines Kunden berücksichtigen. Während die einzelnen Aufgaben eines Netzwerkprozessors umfassend verstanden sind, ist nach wie vor unklar, in welcher Form mehrere Funktionen, deren Eigenschaften sich möglicherweise gegenseitig beeinflussen, zusammenarbeiten müssen, um eine Dienstqualität beizubehalten. Diese Punkte werden in der vorliegenden Arbeit behandelt, und die Hauptbeiträge zum Forschungsgebiet der Algorithmen und Architekturen von Netzwerkprozessoren sind: Eine Abstufung von Netzwerkdiensten wird vorgestellt, welche die Anforderungen an der Schnittstelle zwischen Kunden- und Dienstanbieternetzwerken berücksichtigt. Verschiedene Kombinationen von Funktionen, die ein Netzwerkprozessor ausführen muss, werden für die vorgeschlagene Abstufung von Diensten mit

5 iv Hilfe von umfangreichen Simulationen untersucht. Dabei wird sich auf die Beibehaltung der Dienstqualität konzentriert. Die Untersuchung der Funktionen wird mit einer Bewertung geeigneter Architekturblöcke für Netzwerkprozessoren kombiniert, so dass der Einfluss von Algorithmen auf die Auslastung von Hardwareressourcen durch gleichzeitige Simulation beider Aspekte ergründet werden kann. Die Diskussion eines bestimmten Hardwareblocks, des sog. Speichercontrollers, wird weiter verfeinert, da dieser Block grosse Auswirkungen auf die Gesamtperformanz eines Systems zeigt. Der Einfluss eines anwendungsspezifischen Speichercontrollers wird durch umfangreiche Simulationen verschiedener Testanwendungen, dynamischer RAMs und unterschiedlicher Speicherzugriffsverfahren aufgezeigt, die in einen ausgereiften Cl'Ll-Simulator integriert worden sind.

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