All-Digital Standard-Cell Based Audio Clock Synthesis

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1 Diss. ETH No All-Digital Standard-Cell Based Audio Clock Synthesis A dissertation submitted to the SWISS FEDERAL INSTITUTE OF TECHNOLOGY ZURICH for the degree of Doctor of Technical Sciences presented by ERIC PASCAL ROTH Dipl. El.-Ing. ETH born April 14, 1975 citizen of Daenikon ZH and Luzern accepted on the recommendation of Prof. Dr. Wolfgang Fichtner, examiner Dr. Steven Harris, co-examiner 2004

2 Abstract Consumer electronic (CE) devices connected by computer networks become more and more popular. Data transportation between CE devices must exhibit real-time behaviour to prevent interruptions of the data stream. This requires a synchronization of the data rates at the sending and the receiving streaming device, which is achieved with the transmission of timing information over the network. A phase-locked loop (PLL) in the receiver filters the jitter on the timing information and generates an accurate audio sample clock. In order to save cost and to allow a high portability to different CMOS technologies, the PLL is proposed to compose of standard-cells only and integrated into the System-On-Chip (SoC) of the CE device. The key component of the all-digital PLL is the digitally-controlled oscillator (DCO), which generates the audio clock. In this work, two alternative DCO circuits are proposed. The first is based on the phase shift principle, where the position of the output clock edges are pre-calculated, and a delay line shifts the edges of a fixed input clock to the predetermined position. An all-digital delaylocked loop (DLL) is used for the calibration of the delay line. The second DCO architecture is based on a ring oscillator. The limited frequency resolution of conventional digital ring oscillators is extended by a method that switches rapidly between two adjacent frequency steps. A frequency calibration mechanism tunes the DCO to the target operation range. Both DCO architectures are implemented on silicon for proof of xiii

3 xiv ABSTRACT concepts. The measurement results demonstrate that high-quality audio clock recovery is achieved with the phase shift DCO. The ring oscillator based DCO offers a significantly lower circuit complexity, but due to the high clock jitter, it is only applicable to lowest-cost, and less quality demanding devices. As an important goal of the thesis, the porting of the DCO architecture to different CMOS technologies could be realized within two person-days.

4 Zusammenfassung Die Verbreitung von Geräten der Unterhaltungselektronik, die über ein Computer-Netzwerk verbunden sind, nimmt ständig zu. Der Datenaustausch zwischen diesen Geräten muss real-time Anforderungen genügen, um Unterbrüche in der Übertragung zu verhindern. Deshalb müssen die Datenraten vom Sender und Empfänger synchronisiert werden. Dies wird durch den Austausch von Zeitinformation über das Netzwerk erreicht. Im Empfänger filtert ein Phase-Locked Loop (PLL) den Übertragungsjitter und generiert einen genauen Audio- Abtasttakt. Um Kosten zu sparen und um die Portabilität von einer CMOS Technologie zur nächsten zu gewährleisten, wird der PLL ausschliesslich aus Standard-Zellen zusammengesetzt und auf dem System-On- Chip (SoC) des Gerätes integriert. Das zentrale Element des volldigitalen PLL ist der Digitally-Controlled Oscillator (DCO), der den Audio-Takt erzeugt. In dieser Arbeit werden zwei verschiedene DCO Architekturen präsentiert. Die erste basiert auf dem phase-shift Prinzip, bei dem die zeitliche Position der Ausgangs-Taktflanke berechnet wird. Ein Verzögerungselement schiebt eine Taktflanke des festen Eingangstaktes an die berechnete Position. Das Verzögerungselement wird mit einem Delay-Locked Loop (DLL) kalibriert. Eine zweite, einfachere DCO Architektur basiert auf einem Ring- Oszillator. Herkömmliche digitale Ring-Oszillatoren haben eine begrenzte Frequenzauflösung. Es wird eine Methode vorgestellt, die xv

5 xvi ZUSAMMENFASSUNG durch schnelles Umschalten zwischen zwei Frequenzeinstellungen die Auflösung verbessert. Um den DCO in den gewünschten Frequenzbereich zu ziehen, wird eine Methode zur Frequenzkalibrierung vorgeschlagen. Beide DCO Architekturen sind auf Silizium implementiert worden, um die Machbarkeit zu demonstrieren. Die Messresultate zeigen, dass der phase-shift DCO sehr hohen Audio-Qualitätsansprüchen genügt. Der auf dem Ringoszillator basierende DCO ist deutlich kompakter, jedoch wegen seinem hohen Eigenjitter nur für Geräte mit reduzierten Audio-Qualtitätsansprüchen geeignet. Die Portierung des DCOs auf verschiedene CMOS Technologien kann mit einem Aufwand von zwei Arbeitstagen bewerkstelligt werden, womit ein weiteres wichtiges Ziel der Arbeit erreicht ist.

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