EAW P Bit Rechner

0.. TY () +V () V () STS SR TS.. TY () +V V () () STS SR TS 0,, 0V, S0 0,,,, S 0,,0 000,, S 0 0,,,, 00,,,.0.U.,, 00 0, 00,,0,, 0 0,,,, 0, S,, S00 00,,,,, S0 0,, S 0,,,, S 0 00,, S U0 0, U 00 0 U,, 0,,, U0, 00 0 U, 0,,,,, U00 U0 0 0 0 0,,, 0,,,0,,,,0,,, TS: USS TRWS S. RSSTRS R a, /W, %. TR VUS R RRS. X X R ST X X, ST US T US 0/ 0./ X X U R X, X / / X +V X V W 000 it Rechner : Stromlaufplan_0.sch RVS:.0 RW Y: liver ehmann <lehmann@ans netz.de> 0 TT

0 ZST0 (Sh. ) ZST (Sh. ) ZST (Sh. ) ZST (Sh. ) ZS (Sh. ) ZR/W (Sh. ) ST0 ST ST ST S R/W R.k S ST0 ST ST ST S /S /W R/W T (Sh. ) RRTY (Sh. ) X X X X X X X X X X X X X X X US (Sh.,) S (Sh.,,) /S (Sh. ) S (Sh.,,,,,) R/W (Sh.,,,,) ST0 (Sh. ) ST (Sh. ) ST (Sh.,,) ST (Sh.,,) SYS S (Sh. ) WRY (Sh. ) T (Sh. ) S (Sh. ) W/R (Sh.,,,) S (Sh.,) ST (Sh. ) X X WRY (Sh. ) X X X X /W (Sh.,) V (Sh.,,,) X X X X X X US (Sh. ) X X RST (Sh. ) X X ST (Sh. ) 000 (Sh. ) T WT (Sh. ).k US ST0 US ST US ST US ST US /\S US R RTY US R/W US /W US S US US ST 0 0 US V US V US R US US.k US RST Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y 0 Y Y Y Y Y Y Y Y 0 0 ST0 ST ST ST /S R/W /W S /S S R/W ST0 ST ST ST S R/W /W S ST /W ST V V USR RST ST R WT 0 X ST0 ST ST ST S S R/W /W X X WT ST R /S ST V V USR RST Z00 ST0 ST ST 0 ST S S 0 R/W /W US WT ST R /S ST V V USR RST 0 S0 S S S S S S 0 0 S0 S S S S S S 0 0 S S S S S S S0 i R i R 0 i i 0 0 S S S S S S S S0 S S S S S S S S0 0 only! 0 0 (Sh.,) 0 (Sh.,,,,,) 0 (Sh.,,,,,,,) SSVR (Sh. ) S0 S (Sh., ) S0 S (Sh.,) ZUS (Sh.,) R (Sh.,) 0 0 ST (Sh. ).k.k.k.k Z00 U Segment Violation Register 0 TT : W 000 it Rechner Stromlaufplan_0.sch RVS:. RW Y: liver ehmann <lehmann@ans netz.de> 0

0 0 (Sh. ) 0 (Sh. ) 0 0 0 0 YT (Sh. ) 0 0 0 TRYT (Sh. ) ST (Sh. ) ST0 (Sh. ) ST (Sh. ) ST (Sh. ) ST (Sh. ) 0 Y0 Y Y Y Y Y Y Y 0 / R (Sh.,) ST (Sh. ) V (Sh. ) U/UR (Sh.,) X X (Sh. ) SYS S (Sh. ) R (Sh. ) R (Sh. ) R (Sh. ) US (Sh. ) X U (Sh. ) 00 00 U 000 X X R.k Y0 Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y US RS US / US US S US R US R US R STR (Sh. ) STTSTW (Sh.) X X X X X X X X X X X X X X US (Sh. ) 0 0 TRRR (Sh. ) WR (Sh. ) 0 US X (Sh. ) S (Sh. ) 00 (Sh. ) xternal Violation Registers V generation TT : W 000 it Rechner Stromlaufplan_0.sch RVS:.0 RW Y: liver ehmann <lehmann@ans netz.de> 0

0 0 (Sh. ) 0 0 Z0 T R R U 0 (Sh. ) T 0 (Sh. ) S0 T 0 R R U (Sh. ) S R R T RST R R U (Sh. ) /TR0 Z/T0 /TR Z/T S (Sh. ) STR (Sh. ) /TR 0 /TR Z/T T 0 (Sh. ) 0 0 Z0 T R R U (Sh. ) T T (Sh. ) (Sh. ) (Sh. ) S0 S (Sh. ) R (Sh. ) R R (Sh. ) R V (Sh. ) RST (Sh. ) T RST 0 (Sh. ) U (Sh. ) /TR0 Z/T0 /TR Z/T /TR Z/T 0 /TR T (Sh.,) R/W (Sh. ) /W (Sh. ) YT SW (Sh. ) 0 0 YT SW (Sh. ) X X US R.k 0 R TRRR (Sh. ) TRRR (Sh. ) RRTY (Sh. ) R SYS S (Sh. ) Serial nput/utput: aud Rate enerators yte Swap uffer: create the input buffer enable signal arity rror hecking: parity error flip flop TT : W 000 it Rechner Stromlaufplan_0.sch RVS:.0 RW Y: liver ehmann <lehmann@ans netz.de> 0

0 0 (Sh. ) 0 S0 T0 X X 0 R0 X U 0 (Sh. ) X X X X X X X X 0X X /TR T0 T0 T0 TR0 X X RTS T0 RTS0 X 0 0 0 Z0 S/0 W/RY W/RY Tx T0 T0 X (Sh. ) (Sh. ) S 0 (Sh. ) RST (Sh. ) (Sh. ) R (Sh. ) R (Sh. ) / / RST R R TR RTS Tx TS Rx SY W/RY 0 TR RTS Tx TS Rx SY W/RY RTS TS Rx 0 0 0 0 R.k 0 0 0 0 0 TS0 SR0 R0 X 0 X X X 0 (Sh. ) 0 TR TR V (Sh. ) T (Sh. ) T RTS Tx RTS Tx TR T0 S TR X X Rx Tx TS TS Tx T0 T X U (Sh. ) RxTx Rx SY Rx SY R.k 0 X 0 Rx T0 0 R X T0 T0V (Sh. ) S 0 (Sh. ) Serial nput/utput: S channels 0 through TT W 000 it Rechner : Stromlaufplan_0.sch RVS:. RW Y: liver ehmann <lehmann@ans netz.de> 0

0 T0V (Sh. ) 0 (Sh. ) W/RY T0 S S TR X X X RTS T0 T X Tx R.k 0 X 0 TS 0 R.k 0 R SS X X 0 (Sh. ) (Sh. ) S (Sh. ) RST (Sh. ) (Sh. ) R (Sh. ) R (Sh. ) 0 (Sh. ) V (Sh. ) S 0 (Sh. ) U (Sh. ) U (Sh. ) 0 +V Z0 S/0 0 0 / / RST R R 0 T Rx Tx RxTx S W/RY TR RTS Tx TS Rx SY W/RY TR RTS Tx TS Rx SY Vin Vout djust 0 R. W/RY TR RTS Tx TS Rx SY W/RY TR RTS Tx TS Rx SY + RTS RTS W/RY RTS Tx TS R T0 T0 R 0 0 0 0 R.k R R.k R.k R U Vcc U UT node athode Vcc UT node Y Y athode V R R 0 0 V R, R, + S+ S S S+ TR T R SS + X X X X X X X X X 0 X X X X.k.k +V Vin Vout X djust R. + X S (Sh. ) Serial nput/utput: S channels through TT W 000 it Rechner : Stromlaufplan_0.sch RVS:.0 RW Y: liver ehmann <lehmann@ans netz.de> 0

0 0 (Sh. ) 0 (Sh. ) 0 (Sh. ) 0 0 0 0 Z0 / S / S R R T 0 0 RY ST 0 0 X X X 0/ / / / / / / / RY0 ST0 T V/ V/ V/ V/ X X X X X X X X X X X X X X X X X RY ST RY0 ST0 X X X 0 (Sh. ) (Sh. ) (Sh. ) 0 0 0 0 Z0 / S / S R R T 0 RY ST 0 0 0X 0/ / / / / / / / RY ST T V/ V/ V/ V/ V/ V/ X X X X X X X X X X X X X X X X X (Sh. ) RST (Sh. ) 0 0 0 0 0 Z0 RY ST 0 0 0 0 i R R.k 0 0 R R 0 R RY ST RST 0 X X X (Sh. ) X X X X X X X X X WRY (Sh. ) (Sh. ) (Sh. ) (Sh. ) R (Sh. ) R (Sh. ) V (Sh. ) (Sh. ) 0 (Sh. ) WRY (Sh. ) / S / S R R T RY ST 0 RY ST 0 0 0 Y Y Y Y Y Y Y Y 0 ST TR R STTUS STTUS STTUS0 not used not used T RY ST WRY R X 0 X X X X X X X X X X (Sh. ) X X Serial nput/utput: aud Rate enerators arallel / orts TT : W 000 it Rechner Stromlaufplan_0.sch RVS:.0 RW Y: liver ehmann <lehmann@ans netz.de> 0

0 0 (Sh. ) S0 S (Sh. ) ZST0 ZST (Sh. ) S0 S S S S S Z0 U 0 0 S0 S S S 0 S S S 0 TR TR TR TR TR TR TR TR TR TR TR TR TR0 TR TR TR S0 S S S S S Z0 U 0 0 S0 S S S 0 S S S 0 TR TR TR TR TR TR TR TR TR TR TR TR TR0 TR TR TR S0 S S S S S S Z0 U 0 0 S0 S S S 0 S S S 0 TR TR TR TR TR TR TR TR TR TR TR TR TR0 TR TR TR ZST0 ZST ZST ST0 ST ST ST U ST ZST0 ZST ZST ST0 ST ST T U ST ZST0 ZST ZST ST0 ST ST U ST ZST ST SU ZST ST SU ZST ST SU S S S S S S R/W R/W R/W /S /S /S S S S RST RST RST SY SY SY TR0 TR (Sh. ) ST (Sh.,) SU (Sh. ) ZUS (Sh. ) 000 (Sh. ) RST (Sh. ) ZR/W (Sh.) S (Sh. ) R.k R.k ST (Sh. ) (Sh. ) T (Sh. ) (Sh. ) (Sh. ) (Sh. ) S (Sh. ) Y (Sh. ) 00 S Y (Sh. ) T (Sh. ) ST (Sh. ) R.k R R 0 00 0 R R only! 0 ST 0 R R only! 0 0 SU 0 SYS S (Sh. ) STTSTW (Sh. ) S (Sh. ) ST (Sh. ) ST (Sh. ) emory anagement Units TT W 000 it Rechner : Stromlaufplan_0.sch RVS:.0 RW Y: liver ehmann <lehmann@ans netz.de> 0

0 (Sh. ) 0 (Sh. ) 0 0 0 /V 0 0 0 0 /V 0 0 0 0 0 0 W S W S (Sh. ) W/R (Sh. ) 0 0 0 /V 0 0 0 /V 0 0 0 W S 0 0 W S (Sh. ) R (Sh. ) W/R (Sh. ) 00 0 (Sh. ) /W (Sh. ) 0 (Sh. ) Read nly emory Read/Write emory TT : W 000 it Rechner Stromlaufplan_0.sch RVS: RW Y:.0 liver ehmann <lehmann@ans netz.de>

0 S (Sh. ) 0 (Sh. ) 0 (Sh. ) S (Sh. ) S0 (Sh. ) (Sh. ) R (Sh. ) R (Sh. ) ST (Sh. ) (Sh. ) SRR (Sh. ) S0 S (Sh. ) T (Sh. ) ZS (Sh. ) W/R (Sh. ) SSYSR (Sh. ) S S S S S 0 0 0 0 0 0 0 0 0 Y0 Y Y Y Y Y Y Y R R 0 0 0 0 00 i R i only! SR 00 R R R R R R R R0 R R R R R R R R0 R R R R0 R R R R R R R R R0 R R R 0 >o =o <o 0 >i =i <i 0 >o =o <o 0 0 Y Y Y Y Y Y Y Y 0 T R 00 0 0 0 0 0 0 Y Y Y Y Y Y Y Y Y Y (Sh.,,) (Sh. ) 0 (Sh. ) U (Sh. ) WR (Sh. ) TRRR (Sh. ) (Sh. ) T (Sh. ) ST (Sh. ) R/W (Sh. ) >i =i <i S USR (Sh. ) /S (Sh. ) SUSR (Sh. ) /S S USR 0 (Sh. ) ST (Sh. ) 0 ST (Sh. ) 00 X 0 emory anagement ontrol ogic arity rror hecking: error buffer () TT : W 000 it Rechner Stromlaufplan_.sch RVS:.0 RW Y: liver ehmann <lehmann@ans netz.de> 0

0 m Z X US RU/T RU/ / S T/ 0 0 T (Sh. ) 0 RY T/ X X US SS0 US SS SS SS RST T R T T WT RSTUT ST ST ST 0 0 0 0 0 0 WT (Sh. ) T (Sh. ) ZST (Sh. ) ZST (Sh. ) ZST (Sh. ) X z X R 00 RST U 0 0 0 0 0 0 0 0 R 0 R 0 T (Sh.,) T (Sh.,,,) 0 (Sh.,,,,) 000 (Sh.,) kz 0 0 R 0 0 0 R 0 0 0 0 US U X X RST0 RST U (Sh. ) Y (Sh. ) k k R.k R R S (Sh. ) / R (Sh. ) U/UR (Sh. ) R R X R.k WR RST (Sh. ) WR (Sh. ) WR (Sh. ) TRYT (Sh. ) X X TST RST RST R.k R R R.k 0 0./ lock eneration ircuit () aud lock enerator () System Reset ogic () T Wait State enerator ogic () TT : W 000 it Rechner Stromlaufplan_.sch RVS:.0 RW Y: liver ehmann <lehmann@ans netz.de> 0

0 0 (Sh. ) / R 0 0 0 Y0 Y Y Y Y Y Y Y S0 (Sh. ) S (Sh. ) 0 (Sh. ) (Sh. ) (Sh. ) T0 (Sh. ) T (Sh. ) 0 0 0 0 Y0 Y Y Y Y Y Y Y SYS (Sh. ) SSYSR (Sh. ) SRR (Sh.,) SSVR (Sh. ) RTT (not connected) TRYT (Sh.,) YT (Sh. ) / R (Sh. ) 0 S (Sh. ) S (Sh. ) R/W (Sh. ) V (Sh. ) R R 0 0 (Sh.,,,,) R (Sh.,,,,) R (Sh.,,,) R R 0 T (Sh. ) SYS (Sh. ) (Sh. ) (Sh. ) 0 0 (Sh.,) (Sh. ) 0 eripheral andshaking ogic (0, 0) TT W 000 it Rechner : Stromlaufplan_.sch RVS:.0 RW Y: liver ehmann <lehmann@ans netz.de> 0

0 Y (Sh.,) 0 0 T (Sh. ) T (Sh. ) S (Sh. ) (Sh. ) R/W (Sh. ) ZUS (Sh. ) R R R (Sh. ) T (Sh. ) 0 (Sh. ) 0 (Sh. ) S0 S (Sh. ) TR0 TR (Sh. ) TR TR TR TR TR TR TR TR TR TR TR TR TR0 TR TR TR S0 S S S S S S 0 0 0 0 0 0 (Sh. ) YT SW (Sh. ) U/UR (Sh. ) W/R (Sh. ) S (Sh. ) U (Sh. ) ST (Sh. ) X TSTT.k R R 00 0 0 0 00 Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y 0 Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y i R i R YT SW (Sh. ) 0 0 US (Sh. ) insatz des yte Swap uffers () vorgesehen aber nicht bestueckt. Wuerde bei aktiv 0 auf schalten 0 X X X X X X X X X X 0 X X 0 X X X X X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X 0 X X 0 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X X W 000 it Rechner TT ddress/ata uffers and Steering ogic : Stromlaufplan_.sch RVS:.0 RW Y: liver ehmann <lehmann@ans netz.de> 0

0 0 (Sh. ) (Sh. ) T 0 (Sh. ) T (Sh. ) S (Sh. ) S 0 (Sh. ) 0 0 X X X X US US US US US US US US US X X X X X (Sh. ) (Sh. ) SYS (sh. ) (Sh. ) S (Sh. ) SYS S (Sh. ) 0 S Y (Sh. ) R R 0 (Sh. ) 00 SYS S (Sh. ) R (Sh. ) X X (Sh. ) R.k US WT R R 0 T WT (Sh. ) T (Sh. ) WT (Sh. ) 0 (Sh. ) 0 RRTY (Sh.,) S USR (Sh. ) U (Sh. ) (Sh. ) RST (Sh. ) R SUSR (Sh. ) W/R (Sh. ) (Sh. ) SYS (Sh. ) R/W (Sh. ) 0 0 00 00 Y Y Y Y Y Y Y Y 0 R S (Sh. ) T (Sh. ) R R SU (Sh. ) (Sh. ) SYS S (Sh.,) S (Sh. ) nterrupt riority onnection System onfiguration Register T Wait State enerator ogic () TT : W 000 it Rechner Stromlaufplan_.sch RVS:.0 RW Y: liver ehmann <lehmann@ans netz.de> 0