Operation and performance limits of MOS controlled semiconductor power devices
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1 Research Collection Doctoral Thesis Operation and performance limits of MOS controlled semiconductor power devices Author(s): Lendenmann, Heinz Publication Date: 1995 Permanent Link: Rights / License: In Copyright - Non-Commercial Use Permitted This page was generated automatically upon download from the ETH Zurich Research Collection. For more information please consult the Terms of use. ETH Library
2 OISS.ETH A*«-2> Diss. ETH No Operation and Performance Limits of MOS Controlled Semiconductor Power Devices A dissertation submitted to the SWISS FEDERAL INSTITUTE OF TECHNOLOGY ZURICH for the degree of Doctor of Technical Sciences presented by HEINZ LENDENMANN MSEE born December 13, 1962 citizen of Wald, AR, Switzerland accepted on the recommendation of Prof. Dr. W. Fichtner, examiner Prof. Dr. A. Jaecklin, co-examiner 1995
3 Abstract Advanced process technology for power semiconductor switches permits the implementation of high impedance control electrodes and an improved current handling capability. The gained controllability reduces the complexity of gate drive units and the need for passive protection elements (snubbers). The MOS controlled thyristor concept (MCT) is a device structure realizing these features. This device is well suited for high blocking voltages (>2 kv) since low on-state voltages are achievable. However, prior experiments revealed a significant turn-off current density degradation for larger devices. In this thesis the operation ofmct's is investigated in detail by experiment and simulation. The cell operation was improved and the electrical character istics as a function of the manufacturing parameters switching limitations are identified. At low anode voltages, are obtained. Two distinct the MOSFET design and the cathode structure determine the maximum controllable current, whereas at high voltages the limit is given by the properties of the lowly doped wide base. Consideration of the realistic device structure including the device bound ary and the termination revealed additional limitations. Unavoidable dynamic current redistributions can lead to current filaments, switching failures and possibly device failures. The parameters defining these limits are identified and design guidelines for the anode, the cathode and the boundary structure are formulated. The optimization of the performance trade-offs (static losses, turn-on, turn-off, SOA) for various design implementations, including cathode and anode shorting, is described. Detailed experimental investigations of two different non-punch-through MCT concepts (MCT, IGTh) verified the operation and the failure mechanisms iii
4 iv Abstract of such devices. in inductive clamped mode. The optimized devices are able to control 50 A at 1800 V This corresponds to the predicted theoretical limitation for these devices with an active area of 72 mm2. The results of this work indicate that fundamental mechanisms limit the further up-scaling of the current handling capability of MCT chips in high voltage hard switching applications.
5 Zusammenfassung Moderne Halbleiter-Leistungsschalter ermoglichen verbesserte Schalteigenschaften bei verringerter Steuerleistung dank isolierter Steuerelektrode und fein strukturierter Kathode. Dies vereinfacht die Ansteuereinheit und ermsglicht einen sicheren Betrieb ohne die bisher notwendige passive Schutzbeschaltung. Der MOS-kontrollierte Thyristor (MCT) ist ein solcher Halbleiterschalter, der im eingeschalteten Zustand trotz hohen Blockierspannungen (>2 kv) geringe statische Verluste aufweist. Erste Experimente zeigten jedoch, dass mit zunehmender Grosse der Bauelemente die maximal abschaltbare Stromdichte stark reduziert wird. In dieser Arbeit wurde die Funktionsweise des MCT untersucht. Mit Hilfe experimenteller Messungen und numerischer Simulation wurde der Zusammenhang zwischen elektrischen Eigenschaften und Herstellungsparametem beschrieben. Dabei konnten zwei verschiedene Mechanismen identifiziert werden, welche die maximale Schaltgrenze des "idealen" Elements bestimmen. Diese Grenze wird bei kleinen Spannungen durch die geometrische und physikalische Struktur des MOSFETs und bei hohen Spannungen durch die Eigenschaften der niederdotierten Basiszone gegeben. Die Untersuchung grossflachiger Bauelemente in der Simulation, die auch die Randregion und den Hochspannungsabschluss umfasst, ermoglichte weitere begrenzende Mechanismen zu entdecken. Die dynamische Umverteilung des Stroms wahrend des Schaltvorgangs fuhrt zu Stromfilamenten, Schaltfehlern und Schalterdefekten. Die daftir verantwortlichen Parameter wurden identifiziert und daraus Designregeln abgeleitet, welche eine optimale Gestaltung der Anode, der Kathode und des Randes ermoglichen. Weiter wurden die Abhangigkeiten zwischen den statischen Verlusten, dem Ein- und Ausschaltverhalten und dem Ausschaltvermogen fur verschiedene Elementstrukv
6 vi Zusammenfassung turen, zum Beispiel mit zusatzlichen Anoden- oder Kathodenkurzschliissen, beschrieben. Detaillierte Experimente mit MOS-kontrollierten Thyristoren (MCT, IGTh) bestatigten Durch konsequente Beriicksichtigung die beschriebenen Schaltfehlermechanismen. all dieser Erkenntnisse konnten MCTs mit einer aktiven Siliziumflache von 72 mm2 realisiert werden, welche 50 A bei 1800 V Anodenspannung bei induktiver Last ausschalten. Dies der erwarteten theoretischen Grenze fur diese Strukur. entspricht Diese Ergebnisse zeigen, dass die im Funktionsprinzip des MCT liegenden Ursachen der Ausschaltfehler der Erhohung des maximal abschaltbaren Stroms eines einzelnen MCT Chips bei hohen Spannungen Grenzen setzen.
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